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CXD2306Q
10-bit 80MSPS 1ch D/A Converter For the availability of this product, please contact the sales office.
Description The CXD2306Q is a 1-ch 10-bit 80MSPS D/A converter for fine monitor and video, and is ideal for high definition TVs and high resolution displays. Features * 10-bit resolution * Maximum conversion rate 80MSPS * Differential linearity error 0.5 LSB * Low power consumption 150 mW(max.) (When 80MSPS 200 load, 2 Vp-p is output) * Single 5 V power supply * Built-in independent constant-voltage source * Stand-by function Structure Silicon gate CMOS IC 32 pin QFP (Plastic)
Absolute Maximum Ratings (Ta=25 C) * Supply voltage AVDD, DVDD 7 V * Input voltage (All pins) VIN VDD + 0.5 to VSS - 0.5 V * Output voltage IOUT 0 to 15 mA * Storage temperature Tstg -55 to +150 C
Recommended Operating Conditions * Supply voltage AVDD, AVSS 5.0 0.25 DVDD, DVSS 5.0 0.25 * Reference input voltage VREF 0.5 to 2.0 * Clock pulse width tPW1, tPW0 5.6 (min.) * Operating temperature topr -20 to +85
V V V ns C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E92X12D01
CXD2306Q
Block Diagram and Pin Configuration
(LSB) D0 30 D1 31 D2 32 D3 D4 1 2 DECODER LACHES 6MSB'S CURRENT CELLS DECODER 19 VREF CURRENT CELLS (FOR FULL SCALE) CLOCK GENERATOR 17 IREF 21 AVDD BIAS VOLTAGE GENERATOR BAND GAP REFERENCE 20 AVDD 18 SREF 4LSB'S CURRENT CELLS 24 IO 25 AVSS 23 IO 22 VG
D5 3 D6 4 D7 (MSB) D9 5 7 D8 6 DVDD 28 BLK 10 DVDD 13 DVSS 15 DVSS 27 CLK 9 VB 14 CE 11
Pin Configuration
VREF SREF
18
AVDD
AVDD
IO
24
23
22
21
20
19
17
IREF
VG
IO
AVss 25 NC 26 DVss 27 DVDD 28 NC 29 D0 (LSB) 30 D1 31 D2 32
16 NC 15 DVss 14 VB 13 DVDD 12 NC 11 CE 10 BLK 9 CLK
1
2
3
4
5
6
7
8
D6
D9 (MSB)
D3
D5
D8
27 to 17 to
15 25
Digital section Analog section
--2--
NC
D4
D7
CXD2306Q
Pin Description and Equivalent Circuit Pin No. Symbol I/O Equivalent circuit Description
DVDD
30 to 32 1 to 7
30
D0 to D9
I
to 7 DVSS
Digital input. 30 pin D0 (LSB) to 7 pin D9 (MSB)
8, 12,16, 26, 29 9
NC CLK
--
NC pin Clock input Blanking input. This is synchronized with the clock input signal. No signal (0 V output) at high and output state at low. Chip enable input. This is not synchronized with the clock input signal. No signal (0 V output) at high makes power consumption minimum. Digital power supply
DVDD
DVDD
10
BLK
I
9 10 11 DVSS
11
CE
13, 28
DVDD
--
DVDD
14
VB
O
14
Connect a capacitor of approximately 0.1 F.
DVSS
15, 27
DVSS
--
AVDD AVDD
Digital ground Reference current output. Connect resistance "RIR" which is 16 times output resistance "R".
17
IREF
O
AVDD 17
AVSS
AVDD
19
VREF
I
19 22
Reference voltage input. Sets output full scale value. Connect a capacitor of approximately 0.1 F.
AVSS
22
VG
O
AVSS
--3--
CXD2306Q
Pin No.
Symbol
I/O
Equivalent circuit
AVDD
Description Independent constant-voltage source output pin using band gap reference. Stable voltage independent of the fluctuation for supply voltage can be get by connecting to VREF. See Application Circuit 2 for details.
18
18
SREF
O
AVSS
AVSS
20, 21
AVDD
--
AVDD
Analog power supply
23
IO
24
Inverted current output. Connect to GND normally.
AVSS AVDD
O
23
24
IO
Current output. Output can be retrieved by connecting resistance. The standard is 200 .
AVSS
25
AVSS
--
Analog ground
Description of Operation Timing Chart tPW1 tPW0
CLK ts th ts th ts th 1.5V
I/O Correspondence Table (When 2.00 V output full-scale voltage) Input code MSB LSB 1111111111 : 1000000000 : 000000 0000
100%
Output voltage 2.0 V 1.0 V 0V
DATA
tPD
D/A OUT
50%
tPD
tPD
0%
--4--
CXD2306Q
Electrical Characteristics Item Resolution Conversion speed Integral non-linearity error Differential non-linearity error Precision guaranteed output voltage range Output full-scale voltage Output full-scale current Output offset voltage Glitch energy Differential gain Differential phase Supply current Analog input resistance Input capacitance Output capacitance Digital input voltage Digital input current SREF output voltage Setup time Hold time Propagation delay time CE enable time 1 CE disable time 1
(FCLK=80 MHz, AVDD=DVDD=5 V, ROUT=200 , VREF=2.0 V, RIR=3.3 k, Ta=25 C) Symbol n FCLK EL ED VOC VFS IFS VOS GE DG DP IDD ISTB RIN CI Co VIH VIL IIH IIL VSR ts th tPD tE tD Measurement conditions AVDD=DVDD=4.75 to 5.25 V Ta=-20 to +85 C Endpoint Min. Typ. 10 Max. Unit bit MSPS LSB LSB V V mA mV pV*s % deg mA M pF pF V A V ns ns ns ms ms
0 -2.0 -0.5 1.8 1.8 9.0 1.92 1.92 9.6 50 2.5 1.3
80 2.0 0.5 2.0 2.0 10 1
When D0 to D9= "0000000000" input
ROUT=100 , 1 Vp-p output
CE=L CE=H VREF IO AVDD=DVDD=4.75 to 5.25 V Ta=-20 to +75 C AVDD=DVDD=4.75 to 5.25 V Ta=-20 to +75 C
30 1 1 9 50 2.15 0.85 -5 1.0 5.0 1.0 5 1.3
CE=HL CE=LH
10 1 1
2 2
1 When the external capacitor for the VG pin is 0.1 F. Electrical Characteristics Measurement Circuit Analog Input Resistance Digital Input Current
}
Measurement Circuit
+5.25V
AVDD, DVDD
A
CXD2306Q
V
AVSS, DVSS
--5--
CXD2306Q
Maximum Conversion Rate Measurement Circuit
10bit COUNTER with LATCH
* * *
30 D0 (LSB) * 31 * * 7 D9 (MSB) 9 CLK 10 BLK
IO 24 0.1 VG 22 2V VREF 19 AVDD 200
OSCILLOSCOPE
5k AVss
CLK 80MHz (max) SQUARE WAVE
11 CE 14 VB 0.1
IREF 17 3.3k
DC Characteristics Measurement Circuit
CONTROLLER
* * *
30 D0 (LSB) * 31 * * 7 D9 (MSB) 9 CLK 10 BLK
IO 24 0.1 VG 22 2V VREF 19 AVDD 200
DVM
5k AVss
CLK 80MHz SQUARE WAVE
11 CE 14 VB 0.1
IREF 17 3.3k
Propagation Delay Time Measurement Circuit
30 D0 (LSB) * 31 * * 7 D9 (MSB) 9 CLK 10 BLK CLK 10MHz SQUARE WAVE 11 CE 14 VB 0.1 IO 24 0.1 VG 22 2V AVDD 200 OSCILLOSCOPE
* * * FREQUENCY DEMULTIPLIER
VREF 19
5k AVss
IREF 17 3.3k
Setup Time Hold Time Glitch Energy
}
Measurement Circuit
10bit COUNTER with LATCH
* * *
30 D0 (LSB) * 31 * * 7 D9 (MSB) 9 CLK 10 BLK 11 CE
IO 24 0.1 VG 22 2V AVDD 200 OSCILLOSCOPE
DELAY CONTROLLER CLK 1MHz SQUARE WAVE DELAY CONTROLLER
VREF 19
5k AVss
14 VB 0.1
IREF 17 3.3k
--6--
CXD2306Q
Application Circuit 1
R3
AVDD
DVDD
R4 R1 C R2 C 24 IO 25 AVss 23 IO 22 VG 21 AVDD 20 19 18 17 IREF NC 16 AVSS DVSS
AVDD VREF SREF
26 NC
DVss 15
27 DVss
VB 14 C
28 DVDD C 29 NC
DVDD 13
NC 12
30 D0
CE 11
31 D1
BLK 10
32 D2 D3 1 D4 2 D5 3 D6 4 D7 5 D8 6 D9 7
CLK 9 NC 8
Clock input
* When 5.0V supply voltage (DVDD and AVDD) * Digital input from Pins 30 to 32 and Pins 1 to 7 * Pin 18 is left open when using normally * R1 = 200 * R2 = 3.3k (RIR) * R3 = 3.0k * R4 = 2.0k * C = 0.1F
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--7--
CXD2306Q
Application Circuit 2
AVDD
DVDD
R1
C R2 C
AVSS
DVSS
24 IO 25 AVss
23 IO
22 VG
21 AVDD
20 AVDD
19
18
17 IREF NC 16
VREF SREF
26 NC
DVss 15
27 DVss
VB 14 C
28 DVDD C 29 NC
DVDD 13
NC 12
30 D0
CE 11
31 D1
BLK 10
32 D2 D3 1 D4 2 D5 3 D6 4 D7 5 D8 6 D9 7
CLK 9 NC 8
Clock input
* When 5.0V supply voltage (DVDD and AVDD) * Digital input from Pins 30 to 32 and Pins 1 to 7 * R1 = 200 * R2 = 2.0k * C = 0.1F
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--8--
CXD2306Q
Notes on Operation * Selecting the Output Resistance CXD2306Q is a current output type D/A converter. To create the output voltage, connect the resistor to the current output pin IO. Specifications: Output full-scale voltage VFS = 1.8 to 2.0 [V] Output full-scale current IFS = 10 or less [mA] Calculate the output resistance from VFS = IFS x ROUT. Connect a resistance sixteen times the output resistance to the reference current pin IREF. In some cases, as this value may not exist, a similar value can be used instead. Note that the VFS will be the following. VFS = VREF x 16 ROUT/RIR VREF is the voltage set at the VREF pin, ROUT is the resistor to be connected to the current output pin IO and RIR is the resistor to be connected to the IREF. Power consumption can be reduced by increasing the resistance, but this will on the contrary increase the glitch energy and data settling time. Set the best values according to the purpose of use. * Correlation between Data and Clock For CXD2306Q to display the desired performance as a D/A converter, the data transmitted from outside and the clock must be synchronized properly. Adjust the setup time (ts) and hold time (th) as specified in "Electrical Characteristics". * Power supply and ground Separate the analog and digital signals around the device to reduce noise effects. Bypass the power supply pin to each ground with a 0.1 F ceramics capacitor as near as possible to the pin for both the digital and analog signals. * Latch up Analog and digital power supply must be able to share the same power supply of the board. This is to prevent latch up caused by potential difference between the two pins when the power is turned on. * SREF The SREF is an independent regulated voltage source. By connecting it to the VREF, stable output amplitudes that do not depend on fluctuations in the power supply can be obtained. In this case, as VFS = VSR x 16ROUT/RIR, set the VFS according to RIR. Where VSR is the output voltage of SREF. Do not use this pin as the reference power supply for other IC because this pin is for the exclusive use of the CXD2306Q. * IO pin The IO pin is the inverted current output pin described in the Pin Description. The sum of the currents output from the IO pin and the IO pin becomes the constant value for any input data. However, the performances such as the linearity error of the IO pin output current is not guaranteed.
--9--
CXD2306Q
Latch Up Prevention The CXD2306Q is a CMOS IC which requires latch up precautions. Latch up is mainly generated by the lag in the voltage rising time of AVDD (Pin 20 and 21) and DVDD (Pin 11 and 28), when power supply is ON. 1. Correct usage a. When analog and digital supplies are from different sources
DVDD AVDD
20 21 AVDD +5V +5V C CXD2306Q
13 28 DVDD C DIGITAL IC
AVSS 25 AVSS DVSS
DVSS 15 27
b. When analog and digital supplies are from a common source (i)
DVDD
20 21 AVDD +5V C CXD2306Q
13 28 DVDD C DIGITAL IC
AVSS 25 AVSS
DVSS 15 27 DVSS
(ii)
DVDD
20
21
13
28 C
AVDD +5V C CXD2306Q
DVDD DIGITAL IC
AVSS AVSS 25
DVSS 15 DVSS 27
--10--
CXD2306Q
2. Example when latch up easily occurs a. When analog and digital supplies are from different sources
DVDD AVDD 20 21 AVDD +5V +5V C CXD2306Q 13 28 DVDD C DIGITAL IC
AVSS AVSS 25
DVSS 15 DVSS 27
b. When analog and digital supplies are from common source (i)
DVDD AVDD 20 21 13 28
AVDD +5V C CXD2306Q
DVDD C DIGITAL IC
AVSS AVSS 25 DVSS
DVSS 15 27
(ii)
DVDD AVDD 20 21 AVDD +5V CXD2306Q C DIGITAL IC 13 28
DVDD
AVSS AVSS 25
DVSS 15 DVSS 27
--11--
CXD2306Q
Output full-scale voltage VFS [V]
2.0
1.0
Glitch energy GE [pV*s]
100
50
RIR 16ROUT 0 1.0 2.0 0 100 200
Reference voltage VREF [V] Fig. 1. Reference voltage vs. Output full-scale voltage
Output resistance ROUT [] Fig. 2. Glitch energy vs. Output resistance
Output full-scale voltage [V]
1.90
30
1.85
Supply current IDD [mA]
V = 0.26mV/C -25 0 25 50 75
20
0 Ambient temperature Ta [C] Fig. 3. Ambient temperature vs. Output full-scale voltage
0
1
10
20
30
40
Output frequency FO [MHz] Fig. 4. Output frequency vs. Supply current
SREF output voltage VSR [V]
1.14
Standard masurement conditions and description * AVDD=DVDD=5V * VREF=2.0V * ROUT=200 * RIR=3.3k * Ta=25C * Input data in Fig. 4=all 0, rectangular wave of all 1, clock freq.=80MHz.
1.10
V = 0.34mV/C 0 -25 0 25 50 75 Ambient temperature Ta [C] Fig. 5. Ambient temperature vs. SREF output voltage
--12--
CXD2306Q
Package Outline
Unit : mm
32PIN QFP (PLASTIC)
9.0 0.2 + 0.3 7.0 - 0.1 24 17 + 0.35 1.5 - 0.15
0.1
25
16
32
9
+ 0.2 0.1 - 0.1
1 0.8 + 0.15 0.3 - 0.1
8 + 0.1 0.127 - 0.05 0 to 10
0.24
M
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-32P-L01 QFP032-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS
EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g
--13--
0.50
(8.0)

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